In recent years, Group III nitride semiconductor materials have become of interest as materials for producing light-emitting devices which emit light of a short wavelength. Generally, a Group III nitride semiconductor material is grown on a substrate made of an oxide crystal such as a sapphire single crystal, or a Group III-V compound single crystal, through a method such as metal-organic chemical vapor deposition (MOCVD), molecular-beam epitaxy (MBE), or hydride vapor phase epitaxy (HVPE).
For a long time, a p-type Group III nitride semiconductor having a sufficient carrier concentration was difficult to produce. However, recent studies have revealed that a p-type Group III nitride semiconductor having a sufficient carrier concentration can be produced through, for example, irradiating an Mg-doped gallium nitride (GaN) with a low-energy electron beam (see Japanese Laid-Open Patent Application (kokai) No. 2-257679) or heating an Mg-doped gallium nitride in a hydrogen-free atmosphere (see Japanese Laid-Open Patent Application (kokai) No. 5-183189). One conceivable mechanism for yielding a p-type Group III nitride semiconductor having a sufficient carrier concentration is that a p-type dopant which is contained in the semiconductor and which has been passivated with hydrogen is activated through dehydrogenation on the basis of the aforementioned techniques. Actually, in Mg-doped gallium nitride semiconductor which was activated by an annealing, the concentration of hydrogen atoms is about 1/10 of the concentration of Mg atoms.
Generally, a Group III nitride semiconductor having high crystallinity is grown through metal-organic chemical vapor deposition (MOCVD). However, in a crystal growth apparatus employed in MOCVD, hydrogen molecules, hydrogen radicals, and atomic hydrogen, which are formed through decomposition of hydrogen gas (serving as a carrier gas for conveying source compounds to a substrate) or ammonia (NH3) serving as a nitrogen source, are present at high concentrations. These hydrogen species are incorporated into a Group III nitride semiconductor crystal layer, during the growth thereof, and bond to a p-type dopant added to the crystal during cooling of the crystal layer from a growth temperature. The p-type dopant thus passivated with hydrogen is no longer active and does not provide holes. However, when the semiconductor sample is irradiated with an electron beam or heated, bonds between hydrogen and the p-type dopant are cleaved, thereby removing hydrogen from the crystal, whereby the p-type dopant can be activated.
Of the above two approaches, irradiation with an electron beam can be applied to only a limited area for one operation, and treating the entire area of the semiconductor requires a long time. Thus, this approach is not commonly employed in the industry.
When a p-type Group III nitride semiconductor produced through the other approach; i.e., heat treatment is used to fabricate light-emitting device wafers, some (a certain percentage of) chips have been found to exhibit a low voltage (Vr), which is a voltage generated upon passing a predetermined current in a reverse direction with respect to the pn junction and which is one of the electric characteristics determined after providing electrodes for the chips. Such low Vr values indicate leakage of current with respect to the pn junction, which is not desired for device products. When such failure chips are removed, productivity drops considerably. In general, when hydrogen is removed from a Group III nitride semiconductor through heat treatment, nitrogen is known to be removed simultaneously, thereby reducing crystallinity. This phenomenon may be a cause of lowering Vr.
Meanwhile, a technique for reducing the resistance of a semiconductor layer doped with a p-type impurity element has been disclosed (see Japanese Laid-Open Patent Application (kokai) No. 8-115880). In the technique, during the course of cooling a gallium-nitride-based compound semiconductor doped with a p-type impurity element, an atmosphere containing ammonia gas is changed to a hydrogen or nitrogen atmosphere at 400° C. or higher. The document discloses an example in which an Mg-doped layer whose growth has been completed is cooled to 600° C. under NH3—H2 mixture and, at 600° C., the supply of NH3 is stopped and the atmosphere becomes only hydrogen.
The experiments conducted previously by the present inventors revealed that device operation voltage cannot be reduced when cooling to 600° C. is performed under an NH3 flow. Particularly, when a positive electrode is formed from a metallic material (e.g., Pt), the operation voltage before bonding, which has been sufficiently lowered, is elevated through the heating, at about 300° C., carried out during bonding.
It has also been reported that a sufficient carrier concentration is attained by cooling a Group III nitride semiconductor from a growth temperature to room temperature in an atmosphere of inert gas instead of H2 gas or NH3 gas (see Japanese Laid-Open Patent Application (kokai) No. 8-125222). In an example disclosed in the document, a p-type semiconductor is produced by substituting the growth atmosphere by nitrogen gas or inert gas via vacuum as a transition state.
However, even when a grown semiconductor was cooled in an atmosphere of inert gas instead of H2 gas or NH3 gas, semiconductor chips exhibiting low device operation voltage cannot be produced unconditionally at high yield. In other words, semiconductor chips exhibiting excellent characteristics cannot be produced at high yield and high reproducibility, even when the conditions as stipulated in the document are controlled. In addition, when a positive electrode material such as Pt is employed, the operation voltage increases due to the heat applied during bonding.
There has been disclosed another technique including, immediately after completion of a growth of a nitride semiconductor, changing the growth atmosphere to an inert gas atmosphere at 1,100° C. (i.e., growth temperature) (see Japanese Laid-Open Patent Application (kokai) No. 9-129929). This technique requires 2 to 3 hours for lowering the temperature to room temperature from the time of changing the atmosphere to inert gas.
The present inventors previously confirmed, through experiments, that Vr of the produced chips was lowered according to the above technique in which the atmosphere was changed to inert gas immediately after growth, and that lowering temperature over a long period of time lowered Vr.
Finally, there has been disclosed a technique, for growing a low-resistance p-type gallium-nitride-based semiconductor, including cooling (to ≦700° C.) a semiconductor crystal grown at a 700° C. or higher, in an atmosphere of a carrier gas other than hydrogen (see Japanese Laid-Open Patent Application (kokai) No. 9-199758). In an example described in the document, a p-type gallium-nitride-based semiconductor grown at 1,030° C. is cooled in an atmosphere composed of hydrogen and ammonia, and the atmosphere is changed to nitrogen at 700° C.
The present inventors examined the above growth technique. Even when a grown semiconductor was cooled (to ≦700° C.) in a gas atmosphere other than hydrogen, semiconductor chips exhibiting low device operation voltage could not be produced at high yield. In other words, semiconductor chips exhibiting excellent characteristics cannot be produced at high yield and high reproducibility, even when the conditions as stipulated in the document are controlled. In addition, when a positive electrode material such as Pt is employed, the operation voltage increases due to the heat applied during bonding.
As described above, according to the methods disclosed in Japanese Laid-Open Patent Applications (kokai) No. 5-183189 and No. 9-129929, chips exhibiting leakage are produced, due to a low Vr. According to the methods disclosed in Japanese Laid-Open Patent Applications (kokai) No. 8-115880, No. 8-125222, and No. 9-199758, an operation voltage increases. Particularly when a positive electrode material such as Pt is employed, the operation voltage increases due to the heat applied during bonding.
Thus, hitherto, there has never been proposed a problem-free method for forming a semiconductor layer containing a p-type dopant for fabrication of a Group III nitride semiconductor device, which method attains both satisfactory device characteristics and satisfactory yield.
The aforementioned documents disclose the requirement for reducing the resistance of a layer containing a p-type dopant, and a low-resistive p-type semiconductor layer is provided through any of the disclosed techniques.